1. Field of the Invention
The present invention relates generally to a dead pixel compensation testing apparatus and, more particularly to a dead pixel compensation testing apparatus capable of effectively testing a dead pixel compensation algorithm.
2. Description of the Related Art
A digital camera includes an image sensor that processes the digital signal obtained from a light signal of an object. The two types of image sensors that are widely in use are a charged coupled device (CCD) including a plurality of unit pixels and a complementary metal oxide semiconductor (CMOS).
The CCD and the CMOS capture an image by utilizing a photoelectric conversion unit such as a photodiode to accumulate the electrical charges of the incident light from an object as pixels. The accumulated electrical charges are then converted into digital signals of the pixels. Some pixels may become defective during the fabrication process of the image sensors due to foreign particle contamination or due to various unstable factors that may be present during the fabrication process. The defective pixels, when introduced as described above, may be the source of the fixed pattern noise.
The various types of defective pixels that may result during the fabrication process of image sensors are detected and compensated by the image processing device. For example, a defective pixel that may be present in a pixel array is detected by an image processor by using the data inputted from the image sensor. The image processor then records the position information of the defective pixel in a memory and compensates for the defective pixel.
An image sensor generally includes many blocks of a pixel array, an analog read circuit, a timing generator, an ISP, etc., and, by organically connecting these blocks into one body, the image sensor can be made to operate normally.
However, when there is a functional error in one block, each block must be tested to find the cause of the failure in order to normally operate the entire unit. The blocks have various testing schemes such as self-testing functions and the like. Among these testing schemes, the ISP block includes a test pattern generation block that stores a test image data and provides it to the ISP, in which the test image data is utilized to verify the proper functions of the operations executed after the analog-to-digital conversion process.
Various test patterns (e.g., full black, color bar, cross hedge array bar, color ramp, etc.) stored in the ISP, and these various test patterns are utilized for various testing situations (e.g., pixel array failure, analog read circuit failure, timing generator failure, etc.) in which
Bayer raw data cannot be inputted to verify each of the functional blocks.
However, the number of the self-test patterns required for a dead pixel compensation (DPC) function is quite large when the DPC function is designed in consideration of a majority of algorithms using a line memory and multi-dead pixels. When the number of test patterns to be provided become so large, it undesirably increases the number of logical computations.